Technical Field
The present disclosure relates to the field of semiconductor technology, and more particularly to a method of manufacturing a semiconductor device.
Description of the Related Art
In the field of semiconductor technology, as the critical dimension (CD) of devices continues to shrink, high-k dielectric layers and metal gates are being used to replace the silicon oxynitride (SiON) and polysilicon in conventional semiconductor laminate structures. The use of high-k dielectric layers and metal gates can resolve issues arising from thin gate oxide, for example, gate leakage, polysilicon depletion, boron diffusion, etc.
In the prior art, to adjust the work function of the p-type metal-oxide-semiconductor (PMOS) and n-type metal-oxide-semiconductor (N MOS), metals having different work functions are usually deposited on the PMOS and the NMOS regions. The aforementioned process includes removing the polysilicon gate (dummy gate) in the respective PMOS and NMOS regions prior to depositing the metals having the different work functions. However, the removal of the polysilicon gate (dummy gate) often creates irregularities in the surface morphology at the interface/boundary between the PMOS and NMOS, and leaves behind photoresist residue and polysilicon residue, among other issues. The irregularities and residue can severely impact the yield of the semiconductor device.
FIGS. 1A through 1D illustrate scanning electron microscope (SEM) images of a semiconductor device manufactured using a prior art method. Specifically, the SEM images illustrate different defects in the resulting structures after the removal of the polysilicon dummy gate from the PMOS and NMOS regions. For example, FIG. 1A shows the footing profile of a polysilicon dummy gate after a portion of the polysilicon dummy gate has been removed from one of the PMOS and NMOS regions. FIG. 1B shows irregularities in the surface morphology at the interface/boundary between the PMOS and NMOS (P/N boundary interface). FIGS. 1C and 1D illustrate the presence of photoresist residue and polysilicon residue, respectively. As previously mentioned, the above defects can severely impact the yield of the semiconductor device.